In order to achieve high integration and high performance of semiconductor devices, improvement of an operation speed and increase in capacity of memories are required. Accordingly, fine redistribution traces with a pitch of 10 um or less are required also in a redistribution trace forming process on a semiconductor substrate.
Scaling of a pitch of redistribution traces may result in occurrence of leakage between the redistribution traces. Moreover, a margin when further forming wires, bumps, or the like on the redistribution traces decreases, so that processing by photolithography has become difficult.